Keynote I

Billion Transistor Chips in Mainstream Enterprise Platforms of the Future
Dileep Bhandarkar
Architect-at-Large, Enterprise Platforms Group, Intel Corporation
(Moore's Law Video)
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Today's leading edge microprocessors like the Intel's Itanium  2 Processor feature over 220 million transistors in 0.18µm semiconductor process technology.  Nanotechnology that continues to drive Moore's Law provides a doubling of the transistor density every two years. This indicates that a Billion transistor chip is possible in the 65 nm technology within the next 3 to 4 years. Such chips can be used in mainstream enterprise server platforms.

This talk will review the progress in semiconductor technology over the last 3 decades since the introduction of the first microprocessor in 1971. A short video tape will provide a historical perspective on Moore's Law in the form of an interview with co-founder Gordon Moore, and his thoughts for the future of semiconductor technology.

Key trends in high end microprocessor design including multi-threading  and multi-core will be covered. We have started to see "SMP-on-a-chip" designs for high-end enterprise servers where two processors with Level 2 (L2) cache are incorporated on a single chip. Future microprocessors will offer higher levels of multiprocessor capability on chip as the transistor density increases.

Computer manufacturers are incorporating these high-end microprocessors into large symmetric multiprocessing systems with 8, 16, 32 or even 64 processors. Another trend is the emergence of clustered commercially off the shelf (COTS) servers as credible supercomputing platforms.

This talk will cover anticipated advances in semiconductor technology and relate those to trends in microprocessor design that will drive higher levels of parallelism in mainstream server platforms. Several possible ways of utilizing a billion transistors will be discussed along  with accompanying design challenges.

Keynote II

Beyond Performance: Some (other) Challenges for Future Microprocessors.
Eric Kronstadt
Director, VLSI Systems, IBM TJ Watson Research Center

Traditionally we have focused on higher performance semiconductor technology, higher performance processors, higher performance memory systems, higher performance interconnect, higher performance software, etc., that is until we began focusing on lower power semiconductor technology, more power efficient processors, less power hungry interconnect etc., at the same time we have tried to reduce the cost of each of these components.  The point is, that despite the ever expanding nature of our system approach,  historically we have taken essentially a componentized view. This appears to be changing, as evidenced by recent additions to our technical vocabulary: "systems on a chip", "hardware-software codesign", "autonomic computing".  All of these point to the possibility of a more holistic approach.   We will examine this phenomenon to see if there really is something new here,  what is driving it, and what are the consequences and challenges.

Keynote III

The State of State
Peter Kogge
McCourtney Professor of Computer Science and Engineering
University of Notre Dame

We are all aware of the "memory wall" and the deleterious effects of bandwidth and latency limitations on performance. We also watch with some degree of amazement at the relentless march of Moore's Law as ever larger numbers of transistors are used in increasingly clever architectural and microarchitectural techniques to attempt to reduce the effects of the wall. What has not risen to the same level of consciousness, however, are the effects that all of this has on the size of "program state" and our ability to manipulate it, and move it, to avoid the wall. Instead, the Law of Unintended Consequences has left us with heavier and heavier state, which in turn condemns them to continued existence in the bowels of bigger and bigger microprocessor chips, and farther and farther away from the data they seek in memory.

This talk is a plea to architects to reconsider what we have been doing to ourselves, and ask if there are alternatives that have been overlooked. The talk will begin by revisiting the notion of state, and plot its explosive growth over the last 30 years. The key points of expansion will be correlated with architectural and microarchitectural "advances." Then we will walk through some observations gained from exploring designing in some emerging technologies, and ask the question of what alternative execution models, particularly premised on light weight states, might do to increase performanc and reduce complexity.